Extensible Pattern Recognition in DSP Programs using Cetus

We describe a tool for pattern (idiom) recognition in DSP (digital signal processing) source programs. We focus on patterns for loops and the statements in their bodies as these often are the performance-critical constructs in DSP applications for which replacement by highly optimized, target-specific parallel algorithms will be most profitable. For better structuring and efficiency of pattern recognition, we classify patterns by different levels of complexity such that patterns in higher levels are defined in terms of lower level patterns. Our tool utilizes functionality provided by the Cetus compiler infrastructure for static pattern recognition. It works on the Cetus intermediate representation (IR) and applies bottom-up pattern matching. For better extensibility and abstraction, most of the structural part of recognition rules is specified in XML form. This separates the tool implementation from the pattern specifications.